先进工艺下的版图邻近效应研究进展

Research Progress of Layout Proximity Effect in Recent CMOS Nodes

在28 nm及以下工艺节点,版图邻近效应已经成为一个重要问题。文章概述了版图邻近效应的研究及应用进展,介绍了Poly-gate、High-k/Metal-gate、FinFET等不同工艺下的6种版图邻近效应二级效应,包括阱邻近效应、扩散区长度效应、栅极间距效应、有源区间距效应、NFET/PFET栅极边界邻近效应和栅极线末端效应。在此基础上,详细论述了这些二级效应的工艺背景、物理机理以及对器件电学性能的影响,归纳了目前常见的工艺改进方法。最后,从工艺角度展望了深纳米工艺尺寸下版图邻近效应的发展趋势。

At 28 nm process and below,layout proximity effects are one of the significant device issues.The research and application of layout proximity effects were summarized.Six kinds of layout proximity effects were explained,including well proximity effect,length of diffusion effect,poly spacing effect,active area spacing effect,NFET/PFET gate patterning boundary proximity effect and gate line end effect.The physical mechanisms,influence on the transistor electrical performance and improvement solutions were discussed in detail.Finally,the development trend of layout proximity effects under deep nanometer process size was prospected.