一种ω-k算法的FPGA实现

A FPGA implementation ofω⁃k algorithm

为了提升合成孔径雷达(Synthetic Aperture Radar,SAR)ω-k算法成像系统的运行速度,提出了一种基于数据循环存储的STOLT插值FPGA并行实现方法。该方法将经过“一致压缩”处理的数据进行循环存储;在数据存储结束之后,进行Stolt变换中的变量替换、插值位置计算以及插值系数;在同一时间完成插值系数以及相应的处理数据的获取,进行加权求和,获得插值结果。该方案结构清晰,易于实现,流水化插值处理,并对插值的长度以及点数没有限制,极大地提升了系统的可扩展性以及运行速度。该系统工作频率为142 MHz,可以在18 s以内完成实际数据为32768*65536点8 bit机载雷达数据处理,检测证实了该方法的有效性。

In order to improve the speed of the imaging system of Synthetic Aperture Radar algorithm,an FPGA parallel implementation method based on Stolt interpolation calculation of data cyclic storage is proposed.The method cyclically stored the data processed by the"consistent compression";after the end of the data storage,variable substitution,interpolation position calculation and interpolation coefficient in the Stolt transformation are performed;at the same time,the interpolation coefficient and the acquisition of the corresponding data were completed,and the weighted summation was performed to obtain the interpolation result.The proposal is clear,easy to implement,streamlined interpolation processing,and has no limitation on the length of interpolation and the number of points,which greatly improves the scalability and operating speed of the system.The system operates at 142 MHz and can process the airborne radar data of 65536*163848bit within 18 s.The result show that the method is tested.