低功耗小面积Sigma-Delta DAC数字电路的设计与研究

Design and research of low power and small area Sigma-Delta DAC digital circuit

为满足音频解码DAC中小面积、低功耗、高性能的设计要求,采用左右声道复用一个插值滤波器,插值滤波器采用存储器实现的两级无限冲击响应(IIR)滤波器和梳状滤波器实现128倍的插值,有效地减小了整个插值滤波器所占的面积。数字调制器采用三位量化的三阶反馈结构Sigma-Delta调制器,减小了后端模拟滤波器的设计难度,增加系统的性能。该设计在SMIC 110nm工艺上实现,数字部分的面积为0.102 mm^2,功耗为0.179 mW,测试信噪比为112 dB。分析结果表明,在不影响信噪比的情况下使用IIR滤波器比FIR滤波器可实现更小的面积和更低的功耗,满足小面积、低功耗、高性能的设计要求。

In order to meet the design requirements of small area,low power consumption,and high performance in audio decoding DAC,an interpolation filter is multiplexed on the left and right channels,and the interpolation filter uses a two-stage Infinite Impulse Response(IIR)filter and comb filter implemented by memory.It implements 128 times interpolation,which effectively reduces the area occupied by the entire interpolation filter.The digital modulator uses a three-bit quantized third-order feedback structure Sigma-Delta modulator,which reduces the design difficulty of the back-end analog filter and increases the performance of the system.The design is realized on the SMIC 110nm process,the area of the digital part is 0.102 mm2,the power consumption is 0.179 mW,and the test signal-tonoise ratio is 112 dB.The analysis results show that the use of IIR filters can achieve smaller area and lower power consumption than FIR filters without affecting the signal-to-noise ratio,and meet the design requirements of small area,low power consumption,and high performance.