基于FPGA的千兆以太网交换机的设计与实现

Design and implementation of Gigabit Ethernet switch based on FPGA

针对目前流行的高性能无线路由器以及家庭网关等应用场景,设计了基于FPGA的千兆以太网交换机。采用自顶向下的设计方法,通过MAC控制器、交换控制模块、学习查找模块以及共享缓存空间这4个模块实现系统功能。实现了5个符合IEEE 802.3标准的端口无阻塞线速转发数据帧且支持VLAN功能和QoS功能。搭建了仿真平台和硬件验证平台对设计进行了全面验证。仿真结果和硬件验证结果都表明设计能够正确实现以上功能。

For the popular application scenarios such as high-performance wireless routers and home gateways,designs a FPGA-based Gigabit Ethernet switch.Adopting the top-down design method,the system functions are realized through four modules:MAC controller,switch control module,learning and searching module,and shared cache space.Implemented non-blocking wire-speed forwarding for five IEEE 802.3 compliant ports and supports VLAN and QoS functions.A simulation platform and a hardware verification platform were built to comprehensively verify the design.Both simulation results and hardware verification results show that the design can correctly implement the above functions.