基于FPGA的微震信号快速识别系统设计

Design of micro-seismic signal rapid identification system based on FPGA

高采样率的微震数据采集可以提高微震数据的时间分辨率,但同时也增加数据冗余。通过在现场可编程逻辑门阵列(FPGA)内部嵌入FIR滤波器和STA/LTA算法内核的方法,实现了连续数据采集中对震动数据的识别,降低了连续采集过程中无效噪声数据的空间占用。研究结果表明:所设计系统能对震动数据进行快速识别,在100 k Hz的采样率下,处理1 s的数据仅需2.12 ms。同时与未加入震动数据识别的采集系统相比,在24 h测试中,数据量降低约72%,极大程度地降低了数据存储和传输的压力。

High sampling rate microseismic data acquisition can improve the time resolution of microseismic data,but it also increases data redundancy.By embedding the FIR filter and STA/LTA algorithm inside the field programmable gate array(FPGA)core way to achieve continuous data acquisition for identifying microseismic data,reducing the spatially continuous noise data acquisition process invalid occupied.The research results show that the design system can quickly identify thue vibration data.Processing data of 1 s at a sampling rate of 100 kHz requires only 2.12 ms.At the same time,compared with the system without the vibration data identification,In 24 h test,the amount of data is reduced by about 72%,which greatly reduces the pressure of data storage and transmission.