图像降噪算法的FPGA实现方法

FPGA implementation methods of image denoising algorithm

图像在采集、传输和接收过程中,随机噪声的影响会导致图像质量降低,给后续的图像处理造成干扰,脉冲噪声和高斯噪声叠加而成的混合噪声是数字图像中存在的典型噪声。使用图像降噪算法抑制图像中的噪声,保持图像的原有纹理特征,从而改善图像质量,利用FPGA芯片实现图像降噪算法的硬件加速,满足图像降噪系统的实时性要求。主要对中值滤波算法及其FPGA实现方法进行归纳与总结,首先介绍各种中值滤波的基本思想和实现方法,分析中值滤波算法的降噪性能。接下来重点分析基于中值滤波算法的FPGA实现方法,对比各种硬件设计的资源消耗。最后对图像降噪算法的FPGA实现方法这个领域的发展趋势做出展望。

In the process of image capture, transmission and reception, random noise will reduce image quality and cause interference to subsequent image processing. The mixed noise composed of impulse noise and Gaussian noise is a typical noise model in digital image. Using image denoising algorithm to reduce the noise while maintaining original texture characteristics of the image, thereby improving the image quality. Using FPGA chip to realize hardware acceleration of image denoising algorithm to meet the real-time requirements of image denoising system. Mainly summarizes the median filter algorithm and its FPGA implementation method. It introduces the basic ideas and implementation methods of median filtering and analyze the denoising performance of the improved median filter algorithm. Next it focus on the FPGA implementation methods of median filter algorithms and summarize the resource consumption of various hardware designs. Finally looks forward to the development trend of the FPGA implementation methods of image denoising algorithms.