阵列基板铜工艺不良研究

Cu defects in array process

本文结合产品开发过程中遇到的铜相关不良现象进行研究,提出了有效的改善措施。结果表明,在第一次氮化硅刻蚀中的后灰化工序有高含量的氧气,会使过孔内部铜发生氧化而发黑。使用氢等离子体处理,可以将氧化铜还原成铜,在生产线光学设备测量时过孔反射出金属白色。在氧化铟锡刻蚀过程中,高温退火会造成裸露的铜发生严重氧化,需要去掉退火步骤或者更改设计来规避。在第二次氮化硅刻蚀步骤中,高含量的氧会氧化过孔处的铜,造成过孔连接异常,降低刻蚀步骤中氧气含量可以解决该不良。

The mechanism of defects on Cu process along with the development of new product is studied in this paper,and improvement methods are proposed.The results show that the high flow of O2 used in post ashing corrodes the Cu in PVX1(The First passivation Layer)etch,and makes the Cu hole blackened.After adding the H2 treatment step,CuO can be reduced to Cu,and the hole appears metallic white color during CD(Critical Dimension)measurement.During 1ITO(The First Indium Tin Oxides Layer)etch process,high temperature annealing results in the occurrence of serious oxidation of exposed SD Cu.Skipping anneal or changing mask design can avoid the defect.In the VIA etch step,high content of O2 oxidizes the Cu,resulting in the break of conduction between gate and SD through the hole which leads to the occurrence of vertical line Mura.Reducing the content of O2 of VIA etch can solve the problem.