基于APU+FPGA的机载视频和通讯总线处理系统设计

Design of an Airborne Video and Communication Bus Processing System Based on APU+FPGA

针对目前航空电子系统中几种广泛应用的机载通讯总线,设计了一种基于APU+FPGA的机载视频和通讯总线处理系统。以APU主处理器和可编程逻辑器件FPGA为核心,实现了对输入的1路ARINC818视频与内部生成的字符进行叠加后,输出1路ARINC818视频至显示器显示的功能。同时,支持7路RS-422和4路ARINC429总线通讯。另外,系统还对22路输入离散量和7路输入模拟量进行了处理。该系统方案采用低功耗、高性能和高集成度的APU和FPGA器件作为核心处理器,极大地简化了硬件架构,降低了系统功耗,提高了可靠性。该设计已成功运用于某飞机显示控制管理系统。

An airborne video and communication bus processing system is designed based on APU+FPGA for several widely-used airborne communication buses in current avionics system.With APU main processor and the programmable logic device FPGA as the core one channel of input ARINC818 video is superimposed with the internally generated characters and the function of outputting one channel of ARINC818 video to the display is realized.At the same time it can support 7-way RS-422 and 4-way ARINC429 bus communication.In addition the 22-way input discrete data and 7-way input analog data are processed.The system adopts the low-power high-performance and highly-integrated APU and FPGA as the core processor which greatly simplifies the hardware architecture redu ces the power consumption of the system and improves the reliability.The design has been successfully applied to the display control management system of a certain aircraft.