A 3.3 kV 4H-SiC split gate MOSFET with a central implant region for superior trade-off between static and switching performance

A split gate MOSFET(SG-MOSFET)is widely known for reducing the reverse transfer capacitance(C_(RSS)).In a 3.3 kV class,the SG-MOSFET does not provide reliable operation due to the high gate oxide electric field.In addition to the poor static performance,the SG-MOSFET has issues such as the punch through and drain-induced barrier lowering(DIBL)caused by the high gate oxide electric field.As such,a 3.3 kV 4 H-SiC split gate MOSFET with a grounded central implant region(SG-CIMOSFET)is proposed to resolve these issues and for achieving a superior trade-off between the static and switching performance.The SG-CIMOSFET has a significantly low on-resistance(R_(ON))and maximum gate oxide field(E_(OX))due to the central implant region.A grounded central implant region significantly reduces the C_(RSS)and gate drain charge(Q_(GD))by partially screening the gate-to-drain capacitive coupling.Compared to a planar MOSFET,the SG MOSFET,central implant MOSFET(CIMOSFET),the SGCIMOSFET improve the R_(ON)×Q_(GD)by 83.7%,72.4%and 44.5%,respectively.The results show that the device features not only the smallest switching energy loss but also the fastest switching time.