阵列处理器动态可配置分布式存储访问结构设计

Design of dynamic configurable distributed storage access structure of array processor

为了提高可重构阵列处理器的灵活性,打破传统片上互连的单一性。基于可重构阵列处理器分布式存储结构,提出一种动态可配置分布式存储访问结构。该结构可动态地将簇内4×4个PE独立地配置为本地访问模式、局部访问模式和全局访问模式,实现簇内4×4个PE对4×4个MB的并行访问。选用Xilinx公司的ZYNQ系列芯片XC7Z045 FFG900⁃2进行FPGA仿真。实验结果表明,该结构在无冲突访问模式下最高频率可达212.354 MHz,访问峰值带宽为7.125 GB/s。

In order to further improve the flexibility of reconfigurable array processors,the unicity of traditional on-chip interconnects is broken.A dynamic configurable distributed storage access structure is proposed on the basis of the distributed storage structure of reconfigurable array processor.The access structure can configure 4×4 PEs(processing elements)in the cluster dynamically and independently to local access mode,partly access mode,and global access mode according to the characteristics of data access.Moreover,the structure can achieve 4×4 PEs in the cluster to access 4×4 MBs(memory banks)in parallel.To verify the effectiveness of proposed structure,Xilinx’s ZYNQ series chip XC7 Z045 FFG900-2 is selected for FPGA simulation.The experiment results show that the maximum working frequency of the structure can reach 212.354 MHz and the access peak bandwidth can attain 7.125 GB/s in conflict-free access pattern.