一种基于FPGA并行加速的稀疏矩阵求解方法

A method for solving a sparse matrix based on FPGA parallel acceleration

研究了电力系统电磁暂态仿真中最耗时的稀疏矩阵快速求解问题。采用了算法定义架构的设计思想,提出了一种DAG静态并行调度算法,并设计了与之相适配的硬件并行加速阵列架构。在设计实现中,针对电磁暂态仿真运算中稀疏矩阵求解的特性,采用了精确的节拍级硬件资源调度,实现了高度融合的软硬件协同加速。在此基础上,进行了该设计的测试及性能分析。实验结果表明,该结构和方法在电力系统稀疏矩阵运算中的性能优于通用CPU和GPU。

This paper studies the most time-consuming sparse matrix fast solving problem in the electromagnetic transient simulation of a power system.It adopts the design idea of algorithm definition architecture,proposes a DAG static parallel scheduling algorithm,and designs a suitable hardware parallel to accelerate the array architecture.In the design and implementation,in order to solve the sparse matrix in the electromagnetic transient simulation operation,the precise beat-level hardware resource scheduling is adopted to realize the highly integrated software and hardware coordination acceleration.A design test and performance analysis is carried out.The results show that the structure and method performance is better than general-purpose CPU and GPU in the sparse matrix operation of a power system.