自抗扰锁相跟踪系统设计与仿真

Design and Simulation of Auto-disturbance-rejection Phase-locked Loop

针对锁相跟踪中的抗扰问题,提出了一种新的方案,通过二阶广义积分器将参考信号分解为2路正交信号,在滤波的同时得到精确的相位。数字频率合成器作为信号发生器具有高稳定性和高精确性,可以通过比较参考信号和DDS的相位误差,引入自抗扰控制算法,适应锁相跟踪系统对算法进行改进,输出DDS的频率控制字。最后,通过MATLAB仿真结果表明,该控制器具有很强的鲁棒性和高抗扰性,能够有效地抑制不确定负荷扰动的影响。

A new scheme for disturbance rejection in phaselocked loop is proposed.The reference signal is decomposed into two orthogonal signals by the second order generalized integrator,and the exact phase is obtained while filtering.As a signal generator,Direct Digital Synthesis has a high stability and high accuracy.By comparing the phase error of reference signal and DDS,the Auto Disturbance Rejection Control algorithm is improved for the phaselocked loop and the frequency control word of DDS is outputted.The results of MATLAB simulation shows that the controller has strong robustness and high disturbance rejection.It can effectively restrain the influence of uncertain load disturbance.