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ONO反熔丝器件可编程特性研究 被引量:3

Research on Programming Characteristics of ONO Anti-Fuse Devices
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摘要 ONO(Oxide-Nitride-Oxide)反熔丝器件具有可靠性高、抗辐射、高开关比等优异特性,一直用于抗辐射可编程逻辑器件。基于0.6μm CMOS工艺,分别采用“AF+MOS”和“MOS+AF”集成方法成功制备了ONO反熔丝器件,研究了ONO反熔丝阵列单元编程特性、导通电阻与编程电流以及编程时间之间的关系,同时对两种典型编程通路的编程特性进行特征化表征,考察了反熔丝单元编程前后的电应力可靠性。研究结果表明,采用“AF+MOS”集成方法制备的ONO反熔丝器件具有优良的击穿均匀性和编程特性。 ONO anti-fuse devices have been widely used in programmable logic devices because of its high reliability,radiation resistance and high switching ratio.The programming characteristics of ONO anti-fuse array elements fabricated in 0.6μm"AF+MOS"and"MOS+AF"processes are investigated.The relationship between the resistance of ONO anti-fuse devices and the programming current and time is studied.Meanwhile,two typical programming paths are characterized.The electrical stress reliability of the anti-fuse cells before and after programming is investigated.The results show that the ONO anti-fuse devices fabricated by an"AF+MOS"integration method have excellent breakdown uniformity and programming characteristics.
作者 潘福跃 张明新 曹利超 刘佰清 洪根深 张海良 刘国柱 PAN Fuyue;ZHANG Mingxin;CAO Lichao;LIU Baiqing;HONG Genshen;ZHANG Hailiang;LIU Guozhu(The 58th Research Institute,CETC,Wuxi 214072,China;School of Electronic Science and Engineering,Southeast University,Nanjing 210096,China)
出处 《电子与封装》 2021年第7期77-82,共6页 Electronics & Packaging
关键词 ONO 反熔丝 击穿电压 导通电阻 ONO anti-fuse devices breakdown voltage on-state resistance
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  • 1Iranmanesh A, Karpovich Y, Yoon S. Antifuse reliability and link formation models [C]//IEEE, Proc RELPHY.Lake Tahoe,1994.
  • 2Chiang S, Wang R, Chen J, et al. Oxide-Nitride-Oxide an- tifuse Reliability[C]//IEEE, Proc RELPHY. New Orleans, 1990.
  • 3Chiang S,Wang R, Speers T, et al. Conductive channel in ONO formed by controlled dielectric breakdown[C]//IEEE, Proe RELPHY. Seattle, 1992.
  • 4Kim P J, Ku D S, Jeong L S, et al. Electrical properties of PIP anti-fuse for the logic circuit eonfiguration[C]// SICE Annual Conference. Fukui, 2003.
  • 5Amr M M, Esmat Z H, John L M. Programmable low im- pedance antifuse element: American, US 4943538[P]. 1990.
  • 6Wei C, Chan L, Lee B, et al. Definition of anti-fuse cell for programmable gate array application: American, US 630748 [P]. 2001.
  • 7Rezgui S, Wang J J, Sun Y, et al. SET characterization and mitigation in mitigation in the RTAX-S antifuse FPGAs [C]//Aerospace Conference IEEE. Big Sky, MT, 2009.
  • 8McCollum J. ASIC versus antifuse FPGA reliability[C]// Aerospace Conference IEEE. Big Sky, MT, 2009.
  • 9Takagi M T, et al. A highly reliable metal-to-metal antifuse for high-speed field programmable gate arrays[C]//Electron Devices Meeting, 1993 IEDMr93.
  • 10Technical Digest, Interna- tional. Washington, DC, USA,1993 Wee J K, Yang W, Ryou E K, et al. An antifuse EPROM circuitry scheme for field-programmable repair in the DRAM [J]. IEEE J Solid-State Circuits,2000,35(10) :1408.

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