具有夹层的垂直U型栅极TFET的设计

Design of the Vertical U-Shaped Gate TFET with Sandwich Layer

通过使用工艺计算机辅助设计(TCAD)仿真技术提出了一种新型的带有夹层的垂直U型栅极隧穿场效应晶体管(TFET)结构。该器件是通过优化基于Ge的栅极金属核垂直纳米线TFET结构获得的。通过在沟道中增加重掺杂夹层,器件的平均亚阈值摆幅(SS_(avg))得到了改善;又通过改变器件的源极和漏极材料,器件的开关电流比(I_(on)/I_(off))得到了改善。对夹层的掺杂浓度和厚度以及沟道的高度也进行了优化。最终优化后的器件开态电流为220μA/μm,关态电流为3.08×10^(-10)μA/μm,SS_(avg)为8.6 mV/dec,表现出了优越的性能。与初始器件相比,该器件的SS_(avg)减小了77%,I_(on)/I_(off)增加了两个数量级以上。此外,提出了针对该器件的可行的制备工艺步骤。因此,认为该器件是在超低功耗应用中非常具有潜力的候选器件。

A novel vertical U-shaped gate tunneling field-effect transistor(TFET)with sandwich layer was proposed by using the technology computer-aided design(TCAD)simulation technology.This device was obtained by optimizing the Ge-based gate-metal-core vertical nanowire TFET.By adding a heavily doped sandwich layer in the channel,the average subthreshold swing(SS_(avg))of the device was improved.And by changing the source and drain materials,the on-off current ratio(I_(on)/I_(off))of the device was improved.The doping concentration and thickness of the sandwich layer and the height of the channel were optimized.The final optimized device shows outstanding performance with an on-state current of 220μA/μm,an off-state current of 3.08×10^(-10)μA/μm,and an SS_(avg) of 8.6 mV/dec.The SS_(avg) is reduced by 77%and I_(on)/I_(off) is improved by more than two orders of magnitude,compared with the initial device.In addition,the feasible manufacturing process steps were proposed for the device.Therefore,the proposed device is considered to be a very potential candidate device in ultra-low power applications.