基于改进旋转因子的高性能FFT硬件设计

Hardware efficient FFT design based on improved rotation factor

针对FFT硬件实现中旋转因子模块占用资源较多的问题,设计高性能单路延时反馈结构的基22快速傅里叶变换.采用CORDIC与MCM混合的方法设计旋转因子模块,实现了无需常规乘法器的FFT架构,不必占用DSP48E资源.对于旋转角度数量较少的W16旋转因子模块,采用基于三输入加法器的MCM方法设计,将加法器数量降到最低.对于旋转角度数量较多的W64、W256和W1024模块,采用CORDIC方法设计.依据旋转角度的数学规律,设计旋转角度实时生成模块,与传统的CORDIC方法相比,不需要占用ROM资源,避免了复杂的寻址逻辑和时序控制.与其他构架相比,设计的16 bit 64点快速傅里叶变换在Xilinx Virtex-7上将单位slice吞吐率提高了35.20%,256点FFT在Virtex-5上提高了30.37%,1024点FFT在Virtex-7上提高了25.38%.

A hardware efficient Radix-22 fast Fourier transform based on a single-path delay feedback architecture was designed aiming at the problem that the rotation factor module takes up more resources in FFT hardware implementation.The method of mixing CORDIC and MCM was adopted to design the rotation factor module to realize FFT architecture without conventional multiplier and DSP48E resource.MCM method based on ternary adders was used to minimize the number of adders for the W16 rotation factor module with less rotation angles.CORDIC method was adopted for the rotation factor modules of W64,W256 and W1024 with more rotation angles.The real-time generation module of rotation angles was designed according to the mathematical law of rotation angles.The method does not need to occupy ROM resources and avoids complex addressing logic and timing control compared with the traditional CORDIC method.The designed 16 bit 64-point FFT improves the throughput per slice by 35.20%on Xilinx Virtex-7,the 256-point FFT improves by 30.37%on Virtex-5,and the 1024-point FFT improves by 25.38%on Virtex-7 compared with other architectures.