6Kumar S,Jantsch A,soininen J,et al. A Network on Chip Architecture and Design Methodology[C]. In: Proceedings of IEEE Computer Society Annual Symposium on VLSI, Washington DC, USA: IEEE Computer Society, 2002
7Wang H S, Zhu X, Peh L S, et al. Orion: a power-performance simulator for interconnection networks[C]. In: Proceedings of the 35th Annual ACM/IEEE International Symposium on Microarchitecture, Washington DC, USA: IEEE Computer Society, 2002. 294-305
8Hemani A. Jantsch A,Kumar S,et al. Network on a chip: An architecture for billion transistor era[C]. In: Proceeding of the IEEE NorChip Conference, November 2000
9Hu J, Marculescu R. Energy-aware Mapping for Tile-based NoC Architectures Under Performance Constraints[C]. In.. Proceedings of the 2003 onference on Asia South Pacific Design Automation. New York, USA: ACM Press, 2003. 233-239
10Garey M R, Johnson D S. Computers and intractability: a guide to the theory of NP-completeness[M]. New York, USA: W H Freeman & Co, 1979
