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Design and verification of on-chip debug circuit based on JTAG

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摘要 An on-chip debug circuit based on Joint Test Action Group(JTAG)interface for L-digital signal processor(L-DSP)is proposed,which has debug functions such as storage resource access,central processing unit(CPU)pipeline control,hardware breakpoint/observation point,and parameter statistics.Compared with traditional debug mode,the proposed debug circuit completes direct transmission of data between peripherals and memory by adding data test-direct memory access(DT-DMA)module,which improves debug efficiency greatly.The proposed circuit was designed in a 0.18μm complementary metal-oxide-semiconductor(CMOS)process with an area of 167234.76μm~2 and a power consumption of 8.89 mW.And the proposed debug circuit and L-DSP were verified under a field programmable gate array(FPGA).Experimental results show that the proposed circuit has complete debug functions and the rate of DT-DMA for transferring debug data is three times faster than the CPU.
出处 《The Journal of China Universities of Posts and Telecommunications》 EI CSCD 2021年第3期95-101,共7页 中国邮电高校学报(英文版)
基金 supported by the China-Montenegro 3rd Science&Technology Exchange and Cooperation Project(3-7) the Open Research Fund of Hunan Provincial Key Laboratory of Flexible Electronic Materials Genome Engineering(202005) the Double First-Class Scientific Research International Cooperation Expansion Project of Changsha University of Science&Technology(2019ic18)。
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