小型化低成本频率合成器设计

Design of miniaturized low-cost frequency synthesizer

目前市场对频率合成器的指标、成本和小型化都提出了较高要求。针对频率合成器高分辨率的指标要求,设计了数字频率合成技术(DDS)作为高分辨率的参考,通过实际设计选用AD9912作为DDS电路,采用1 GHz的时钟信号,实际分辨率达到了4μHz,分辨率达到较高水平;针对低相位噪声的要求,设计了多点本振的方案,使得整个环路实现了低单边带相位噪声的目标,通过实验测试,单边带相位噪声为-143 dBc/Hz@10 kHz频偏@2 GHz载波;针对低杂散的指标要求,设计采用了多级滤波的方式,成功滤除倍频带来的谐波和分谐波,然后通过环路带宽低通特性和滤波器成功滤除了混频带来的各种交调杂散,通过采用DDS+PLL的方式,成功滤除了DDS产生的DAC非线性杂散,最后通过测试整个频段杂散小于-87 dBc,测试结果达到先进水平;通过采用芯片电路,设计实现了小型化;通过采用市面上低端的芯片,最后成本达到了2 499元。

At present, the market has put forward higher requirements on the index, cost and miniaturization of frequency synthesizers. According to the high-resolution index requirements of the frequency synthesizer, DDS is designed as a high-resolution reference. Through the actual design, AD9912 is selected as the DDS circuit, and the 1 GHz clock signal is used. The actual resolution reaches 4 μHz, and the resolution reaches a higher level. Aiming at the requirement of low phase noise, a multi-point local oscillator is designed to make the whole loop achieve the goal of low single-sideband phase noise. Through experimental tests, the single-sideband phase noise is-143 dBc/Hz@10 kHz frequency Offset @2 GHz carrier. For low spurious index requirements, the design adopts a multi-stage filtering method to successfully filter out the harmonics and sub-harmonics from the octave band, and then successfully filter out the loop bandwidth low-pass characteristics and filters Various intermodulation spurs from the mixed frequency band, through the use of DDS+PLL, successfully filtered out the DAC nonlinear spurs generated by DDS, and finally tested that the spurs of the entire frequency band were less than-87 dBc, and the test results reached an advanced level;Through the use of chip circuits, the design has been miniaturized. Through the use of low-end chips on the market, the final cost has reached 2 499 yuan.