面向RISC-V处理器的GCC移植与优化

GCC PORTING AND OPTIMIZATION FOR RISC-V PROCESSOR

嵌入式RISC-V处理器交叉开发生成高质量目标代码的关键是GCC的移植与优化。分析GCC的基本结构和RISC-V体系结构的数据与指令特点,建立GCC后端移植机制,采用机器描述方法,生成32位riscv-none-embed-gcc编译器,实现RISC-V处理器的GCC移植,设计强度削弱的窥孔优化方法解决中间代码生成过程中CPU计算代价高的问题。验证与测试结果表明编译器编译正确并具有通用功能,优化后编译生成的目标代码体积减少约11%,提高了目标代码质量,节省了嵌入式处微理器的存储空间。

In the cross-development process of the embedded RISC-V processor,the key of generating high-quality target code is the porting and optimization of GCC.The basic structure of GCC and the data and instruction characteristics of RISC-V architecture are analyzed in this paper.The GCC back-end porting mechanism is proposed.The machine description method was used to generate 32-bit riscv-none-embed-gcc compiler,and GCC porting of the RISC-V processor was completed.The peephole optimization method with strength reduction was designed to solve the problem of high CPU cost during the intermediate code generation phase.The verification and test results show that the compiler can correctly compile source code,and has universal functions,that the size of optimized target code is reduced about 11%.The quality of the target code is improved,and the storage space is saved for the embedded processor with limited resources.