CIS生产工艺对暗电流(Dark Current)性能的影响

Study on Process Influence on Reduction of CIS Dark Current

研究工艺对CIS图像传感器(CMOS image sensor)的影响。通过隔离注入的优化、沉积薄膜膜质的优化、干法刻蚀工艺的优化及热制程的优化可减少硅氧界面载流子与声子群的散射,可大大减少Si-SiO2界面附近陷阱,从而降低CIS传感器的暗电流(Dark Current,DC)。实验数据表明,暗电流可改善30%~82.5%,可适用于不同像素尺寸(0.7~18μm)的CIS产品。

This paper presents process impacton CMOS image sensor(CIS)DC performance.The optimization of IMP process,deposition process,etch process,thermal process can protect gate oxide from the plasma and can reduce FN tunneling and reduce phonon scattering also,thus reducing CIS DC.The experimental results demonstrate that DC could improve 30%to 82.5%making it a suitable technique for pinning purposes for CISs with a 0.7~18μm pitch.