摘要
与消费类电子产品相比,用于继电保护的集成电路(IC)面临着更为严苛的静电放电(ESD)环境,需要高可靠性的电源钳位ESD电路,但这会给芯片带来较大的泄漏功耗。针对继电保护电路的ESD需求,提出了一种低漏电型电源钳位ESD电路,减小了ESD触发模块的电容,有效防止了继电保护下快速上电和高频噪声带来的误触发。利用电流镜结构获得大的等效ESD触发模块电容,保证了泄放晶体管的导通时间。利用钳位二极管技术,减小钳位电路触发模块的泄漏电流。基于标准65 nm CMOS工艺对电源钳位ESD电路进行了流片验证,测试结果表明,人体模型(HBM)ESD防护能力可达4 kV,泄漏电流为25.45 nA。
Compared with consumer electronics, integrated circuits(ICs) for relay protection need high reliability power clamp electrostatic discharge(ESD) circuits to face more severe ESD environment, but it will bring large leakage power consumption to the chip.According to the ESD requirements of the relay protection circuit, a low leakage current power clamp ESD circuit was proposed to reduce the capacitor of the ESD trigger module and effectively prevent the false trigger caused by rapid power on and high-frequency noise.The current mirror structure was used to obtain a large equivalent ESD trigger module capacitance, which ensured the turn-on time of discharge transistor.A clamp diode technology was used to reduce the leakage current of the clamp circuit trigger module.The power clamp ESD circuit was verified based on standard 65 nm CMOS process.The test results show that the ESD protection ability of the human body model(HBM) can reach 4 kV and the leakage current is 25.45 nA.
作者
唐晓柯
李振国
郭海兵
王源
Tang Xiaoke;Li Zhenguo;Guo Haibing;Wang Yuan(Beijing Smart-Chip Microelectronics Technology Co.,Ltd.,Beijing 100192,China;Department of Microelectronics,Peking University,Beijing 100871,China)
出处
《半导体技术》
CAS
北大核心
2021年第9期675-679,700,共6页
Semiconductor Technology
基金
国家电网公司总部管理科技项目(5100-201941436A-0-0-00)。
关键词
静电放电(ESD)
电源钳位电路
电流镜
继电保护
低漏电
electrostatic discharge(ESD)
power clamp circuit
current mirror
relay protection
low leakage current