基于SEM电压衬度的缺陷定位方法研究

Study on Defect Localization Method with Voltage Contrast in SEM

光发射显微分析、光致电阻变化技术两种电失效定位方法在精确定位缺陷上存在局限性,为此提出了基于SEM电压衬度的联用方法用于精确定位集成电路缺陷。首先根据电特性测试进行光发射显微分析或者光致电阻变化分析,结合电路原理和版图,提出失效区域的假设,再进行电压衬度像分析,通过衬度翻转可精确和快速确定缺陷位置,最后通过FIB或者TEM对缺陷进行表征。案例研究显示,有源电压衬度可定位双极型电路铝金属化开路失效,无源电压衬度定位CMOS电路多晶硅栅刻蚀异常引起的漏电流失效,结合形貌和材料分析得出缺陷形成机理和根本原因。

Two electrical fault localization methods including Photon Emission Microscope(PEM) and Optical Beam Induced Resistance Change(OBIRCH) have limitations and difficulties in precise defect localization. To solve the problem, a combined use of voltage contrast based on SEM was proposed for precise defect localization of ICs. PEM or OBIRCH was performed first based on the electrical testing results, combined with schematic and layout analysis, a hypothesis of the possible failure site was then put forward. Contrast flip by voltage contrast analysis should precisely and quickly localize the defect spot, and the defect should be characterized by FIB or TEM. Results of case study showed that active voltage contrast method was effective in open failure localization caused by aluminum metallization of bipolar circuit, while passive voltage contrast method was effective in gate leakage localization caused by poly-silicon etching anomaly of CMOS circuit. The topography and materials analysis lead to an understanding of defect mechanism and root causes.