期刊文献+

硅片键合套刻偏差测量技术 被引量:1

Deviation measurement technology for silicon wafer bonding
下载PDF
导出
摘要 硅片键合套刻偏差是影响三维垂向互连封装工艺的重要指标之一。利用红外光可以高效穿透硅基半导体材料的特性,设计了测量键合套刻偏差的红外检测系统。通过测试光源和相机得到的噪声大小和分布作为仿真误差来源;通过MATLAB对不同尺寸、不同类型的套刻标记成像仿真,得到的测量重复性随采样点增多而减小,并在150个采样点时套刻测量重复性趋于稳定的规律;通过仿真检测系统不同数值孔径和套刻标记线宽,得到了测量重复性随对比度增加而减小的特征。根据仿真结果设计了红外检测系统和套刻标记,测试结果接近仿真数据,得到了10 nm以下的测量重复性,证明了利用红外技术高精度检测硅片键合套刻偏差的可行性。 Deviation of silicon wafer bonding is one of the most important indices affecting the packing process of three-dimensional vertical interconnection.In this paper,the bonding deviation detection system is designed according to the high transmittance of infrared light on silicon-based semiconductor materials.The synthetic noise level and distribution are obtained as the source of simulation error by testing the light source and camera.By using MATLAB imaging simulation of different sizes and types of nesting marks,it is found that the measurement repeatability decreases with the increase of sampling points and tends to be stable at 150 sampling points.The measurement repeatability decreases with the increase of contrast by simulating the different numerical apertures and the line widths of nesting marks.The infrared detection system and the nesting marks are designed according to the simulation results.The test results are close to the simulation data and the repeatability of measurement below 10 nm is obtained,which proves the feasibility of using infrared technology to detect the bonding deviation of silicon wafers with high precision.
作者 李运锋 蓝科 LI Yunfeng;LAN Ke(Shanghai Micro Electronics Equipment(Group)Co.,Ltd.,Shanghai 201203,China)
出处 《光学仪器》 2021年第5期7-15,共9页 Optical Instruments
关键词 硅片键合套刻偏差 红外技术 套刻标记 套刻偏差 测量重复性 silicon wafer bonding deviation infrared technology nesting mark nesting deviation measurement repeatability
  • 相关文献

参考文献3

二级参考文献26

  • 1Yole 2007 MEMS Industry Report[B/OL].http://www.yole.fr/pagesAn/products/report_MEMS.asp.
  • 2http://wwwset-sasfr/en/multipagexml?pg=1&id=173582.[Z].
  • 3Bill Silver,"The evaluation and design of a Universal Alignment Target",[C].rev 2.0,March 12,2000.
  • 4Chuan Seng Tan,Ronald J.Gutmann and L.Rafael Reif,"Wafer Level 3-D IC' s Process Technology"[C].(Springer,New York,2008).
  • 5Phil Garrou,"Handbook of 3D Integration"[C].(Wiley,Weinheim Germany,2008).
  • 6D.Gupta,D.R.Campbell,and P.S.,Chapter 7"Grain Boandary Diffusion"[C].Thin Films Interdiffusion and Re actions edited by J.M.Poate,K.N.Tu and I.W.Mayer,(Wiley,New York,1978)p.164.
  • 7Courtesy of STS[Z].
  • 8Pei-I Wang et.al.,"Low Temperature Copper-Nanorod Bonding for 3D Integration"[C].(Mater.Res.Soc.Symp.Proc.970,Pittsburg,PA,2007).
  • 9Paul Enquist,"Direct Bond Interconnect(DBI.)-Technology for Scaleable 3D SoCs'[C].(RTI Conference Proceedings on Semiconductor Integration and Packaging Accessing Technological Developments,Applications,and Key Euablers,Marriot San Francisco Airport Hotel,Burlingame,California,Oct.31-Nov.2,2006).
  • 10G.Wallis, et al.,Field assisted glass-metal sealing[J].Appl. Phys., 1969, Vol40(10):3946.

共引文献17

同被引文献2

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部