FPGA的三重可寻址存储器加速更新机制

Ternary Content-addressable Memory Update Mechanism Based on FPGA

本文提出了两种适用于基于FPGA的TCAM的更新机制,并成功在Xilinx Virtex-6 FPGA上实现。该更新机制包括加速MUX更新机制和低成本LUT更新机制。MUX更新机制仅使用3个输入/输出(I/O)引脚,可提供W+1时钟周期的更新延迟,W是TCAM的宽度;通过使用W I/O引脚,LUT更新机制可产生一个恒定的2个时钟周期的更新延迟,与TCAM的大小无关。

Two update mechanisms suitable for TCAM based on FPGA are proposed in this paper,and are successfully implemented on Xilinx Virtex-6 FPGA.The update mechanism includes an accelerated MUX update mechanism and a low-cost LUT update mechanism.The MUX update mechanism uses only three input/output(I/O)pins and provides update delay for W+1 clock cycles,where W is the width of TCAM.By using W I/O pins,the LUT update mechanism produces a constant 2 clock cycle update delay,independent of the size of TCAM.