基于同步时序的余3码检测器的设计方法

The Design Method of Excess-3 code Detector Based on Synchronous Sequence

余3码作为一种特殊的BCD编码,在各种逻辑运算及加密算法中有着广泛的应用。本文设计一种余3码检测器,可以对从输入端串行输入的先低位后高位的8421码进行分析与判断,当不是余3码时,电路输出为1,否则输出为0。同时,对同步时序逻辑电路设计的常用方法及逻辑电路优化过程作了深入的研究与探讨,详细分析并实现了从抽象问题到检测器成型的每一步骤,为相关研究人员提供了一种通用的设计思路和方法。

As a special BCD code, the excess-3 code are widely used in various logic operations and encryption algorithms.In this paper, a excess-3 code detector has designed, which can analyze and judge the 8421 code serially input from the input terminal, when it is not a residual 3 code, the circuit output is 1, otherwise the output is 0. This paper has made in-depth research and discussion on the common methods of synchronous sequential logic circuit design and the logic circuit optimization process, and detailed analysis and realization of each step from the abstract problem to the formation of the detector, providing IC researchers with A general design idea and method.