零中频接收机的直流偏移消除和自动增益校准

DC Offset Cancellation and Gain Mismatch Auto-calibration in Zero-intermediate-frequency Receiver

为了精确消除零中频接收机中的直流偏移并快速响应射频接收机增益调整时引入的输入直流偏移变化,提出了一种混合型直流偏移消除电路.该电路结合了模拟型和数字型直流偏移消除技术的优势,在降低输出直流偏移的同时缩短了响应时间.模拟型直流偏移消除电路用于实时地自动消除各级输入的直流偏移,数字型直流偏移消除电路通过自动校准进一步减小接收机的最终输出直流偏移.同时提出了一种接收机增益自动校准电路,能够自动校准零中频接收机I/Q通路的增益失配.采用65 nm CMOS工艺实现了集成直流偏移消除的可编程增益放大器和增益自动校准电路.芯片测试结果表明,放大器最大输出直流偏移为2 mV,增益调整具有严格单调性,自动校准后的输出I/Q增益失配小于0.1 dB.该电路具有响应快、仅需开机自动校准和无需数字基带电路参与等优点,完全满足IEEE 802.11ax-2021等宽带通信接收机的系统要求.

To achieve the accurate output direct-current(DC)offset cancellation with fast response to the change of input DC offset introduced by the gain adjustment in the zero-intermediate-frequency receiver,a hybrid DC offset cancellation circuit is proposed.The circuit combines the advantages of analog and digital DC offset cancellation technology,minimizing the output residual DC offset and reducing the response time.The analog DC offset cancellation can automatically eliminate the input DC offset at each stage in real time,and the digital DC offset cancellation further reduces the final output DC offset of the receiver by automatic calibration.An I/Q mismatch calibration circuit is also proposed to automatically calibrate the I/Q gain mismatch of the zero-intermediate frequency receiver.The programmable gain amplifier(PGA)circuit with the proposed DC offset cancellation and the gain mismatch automatic calibration circuit are fabricated in 65 nm CMOS process.The measurement results show that the maximum output DC offset of the PGA is 2 mV and the gain adjustment is strictly monotonic.The output I/Q gain mismatch after automatic calibration is less than 0.1 dB.The circuit has fast response time and only needs power-on calibration without the involvement of digital baseband circuit.The performance of the circuit fully meets the system requirements of wideband communications such as IEEE 802.11 ax-2021 receiver.