摘要
A solid-state fault current limiter(SSFCL)is the key protective equipment in a direct current distribution network.In order to meet the high voltage requirements and reduce costs,implementing a SSFCL based on series-connected insulated gate bipolar transistors(IGBTs)is a promising approach.However,voltage unbalancing of IGBTs would be introduced if the gateloops of the IGBTs are non-identical.In this paper,a plug-in gate-loop compensator with discrete gate voltage feedback and pulsewidth current compensation is proposed.The main merits are:1)with the plug-in structure,the extra current sources only provide small power to fine-tune the gate-loop without affecting the functions provided by the commercial IGBT gate driver;2)the gate-emitter voltages of IGBTs are compared with the preset thresholds to obtain control criterion,and the pulsewidths of the current sources are controlled for gate-loop compensation,thus both analog-digital and digital-analog converters are avoided;3)the control law is easy to implement in FPGA,and is robust to voltage variation of power-loops.With the proposed compensator,the voltage unbalancing is alleviated immediately at the present switching cycle,and further eliminated cycle-by-cycle during the current limitation process.Experimental results verify the feasibility of the proposed compensator.
基金
This work is supported in part by the National Key R&D Program of China(2016YFB0901800 and 2016YFB0901803).
