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一种基于AD9371的8通道射频数据采集电路设计 被引量:1

An 8-Channel RF Data Sampling System Design Based on AD9371
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摘要 AD9371是一款高度集成的宽带RF收发器,该款芯片具有双通道发射器、双通道接收器、模拟混频器、数字信号处理等功能。AD9371具有宽开射频信号范围及宽带特性(频率范围为300 MHz~6 GHz,发射带宽最高支持250 MHz,接收带宽最高支持100 MHz)及高集成度等优点,与数字信号处理部分FPGA接口采用JESD204B接口。提出一种基于AD9371的8通道射频数据采集电路设计方法,电路设计硬件方案以4片AD9371、Xilinx FPGA及HMC7044时钟锁相环电路为核心电路,可实现工作频率范围为300 MHz~6 GHz的雷达信号的接收处理及检测。 AD9371 is a highly integrated,wideband RF transceiver offering dual channel trans-mitters and receivers,integrated synthesizers,and digital signal processing functions.The device has wide frequency range of 300 MHz to 6 GHz,offering dual channel transmitters and receivers.It supports transmitter bandwidths up to 250 MHz and receiver bandwidths up to 100MHz.In ad-dition,AD9371 is high integrated and flexible.The high speed JESD204B interface supports lane rates up to 6144 Mbps between AD9371 and FPGA.A design of 8-channel RF data sampling system is designed based on AD9371.The hardware of this system is based on four chips of AD9371,Xilinx FPGA and HMC7044.The system can meet the RF sampling requirements of ra-dar receivers,working from 300 MHz to 6 GHz.
作者 蒋文吉 汪若愚 JIANG Wenji;WANG Ruoyu(Science and Technology on Electronic Information Control Laboratory,Chengdu 610036,China)
出处 《电子信息对抗技术》 北大核心 2022年第2期87-91,共5页 Electronic Information Warfare Technology
关键词 AD9371 FPGA JESD204B接口 锁相环 AD9371 FPGA JESD204B interface phase locked loop
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