基于IEEE 1588协议的时钟模型线性估计算法

Linear estimation algorithm of clock model based on IEEE 1588

针对高网络负载下非对称延时会严重影响时钟同步精度的问题,提出了一种时钟模型线性估计的方法来提高在高网络负载下的时钟同步精度。首先对主从时钟建立线性模型,然后从时钟以主时钟为参考时钟处理当前同步周期获取的4个时间戳,将其组合成两个端点,通过至少两个同步周期的时间戳信息及端点的特性,找到从时钟模型的线性上界和线性下界函数,由两者的均值确定当前同步周期从时钟的线性函数,最后根据此线性函数估计时间戳数值,从而估计出当前同步周期的主从时钟偏差。为了验证算法的有效性,使用基于开源软件Linux PTP的时钟同步模块对DAC模型和时钟模型线性估计算法进行实验验证和同步精度测试。实验结果表明,时钟模型线性估计算法避免了对本地时钟频率进行连续同向补偿的情况,在弥补了DAC模型不足的同时,达到了23.48 ns的时钟同步精度。

Aiming at the problem that asymmetric delay will seriously affect the clock synchronization accuracy under high network load,a linear estimation method of clock model is proposed to improve the clock synchronization accuracy under high network load.Firstly,a linear model is established for the master and slave clocks,and then the slave clock uses the master clock as the reference clock to process the four timestamps obtained in the current synchronization cycle,and combine them into two endpoints,through at least two synchronous cycle timestamp information and characteristic of the endpoint,find linear upper bound function and linear lower bound function from the model of the slave clock,the linear function of the slave clock in the current synchronization cycle is determined by the mean value of the two,and the timestamp value is estimated according to the linear function,so as to estimate the master/slave clock offset in the current synchronization cycle.In order to verify the effectiveness of the proposed algorithm,a clock synchronization module based on the open source software Linux PTP is used to perform experimental verification and synchronization accuracy test on the DAC model and the proposed algorithm.Experimental results show that the clock model linear estimation algorithm avoids the continuous compensation in the same direction for the local clock frequency,and achieves 23.48 ns clock synchronization accuracy while making up for the deficiency of the DAC model.