一种低压低功耗伪差分环形压控振荡器的设计

Design of a Low-Voltage Low-Power Pseudo-Differential Ring VCO

基于TSMC 28 nm CMOS工艺设计了一个伪差分结构的低压低功耗CMOS环形振荡器。电路包括偏置电路、环形振荡器和输出缓冲器。伪差分环形振荡器有五级延迟单元,延迟单元采用Maneatis对称负载。在Cadence Spectre上进行前仿真。结果表明,VCO工作在0.9 V电源电压下时,其频率调谐范围为0.65 GHz~4.12 GHz。在3.6 GHz以下频率范围内具有很好的调谐线性度。中心频率约为2.3 GHz时,其相位噪声为-79.06 dBc/Hz@1 MHz。输出缓冲电路能够实现轨对轨的输出摆幅,输出占空比可优化至50%。环形振荡器的功耗约为5.7 mW。

A low-voltage low-power CMOS ring oscillator with pseudo-differential structure was designed in the TSMC 28 nm CMOS process, which included oscillator’s bias circuit, ring oscillator and output buffer. The pseudo-differential ring oscillator utilized a five-stage delay unit with a Maneatis symmetrical load to improve the VCO’s tuning linearity and tuning range. Pre-simulation on Cadence Spectre showed that when the VCO was operating at 0.9 V supply voltage, the frequency tuning range was 0.65 GHz to 4.12 GHz. The tuning linearity was excellent in the most area of tuning range. With a center frequency of about 2.3 GHz, the phase noise was-79.06 dBc/Hz@1 MHz. The output buffer stage enabled the rail-to-rail output swing and the duty ratio of 50%. The power consumption of the ring oscillator was approximately 5.7 mW.