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弱电网下无锁相环的并网逆变器无源控制策略 被引量:6

Passivity-based control of grid-connected inverters without phase-locked loop under weak grid
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摘要 并网逆变器工作在弱电网(高阻抗电网)时性能会受到较大影响,这归因于在非常弱的电网下,锁相环与电流环控制之间的相互耦合作用会导致弱电网中的谐波问题,甚至使系统不稳定。在设计分析控制系统时,通常忽略锁相环而产生未建模分析的影响。针对此问题,提出了一种无锁相环的控制策略,该策略是通过直接功率控制理论推导出的矢量电流控制,结合了两者的优点。为了给功率计算提供更加精准可靠的电压信息,采用了一种基于二阶广义积分原理的电压观测器,避免了使用电压传感器和锁相环。此外,为使该策略在非理想条件下具有更好的稳定性和抗干扰能力,由推导的电流模型设计了具有鲁棒性的无源控制器。最后在高阻抗、容性电网条件下进行了实验验证,表明了所提控制具有增强的动态性能和鲁棒性。 Grid-connected inverters can be greatly affected when operating in weak grid(high-impedance grid),which is due to the fact that in very weak grid,the coupling between the phase-locked loop and the current ring control can lead to harmonic problems in the weak grid and even make the system unstable.When designing an analysis control system,the effects of phase-locked loop are often ignored,which has the effect of unmodeled analysis.In view of this problem,a control strategy was proposed without phase-locked loop,which combines the advantages of vector current control derived from the theory of direct power control.Considering providing more accurate and reliable voltage information for power calculations,a voltage observer based on the principle of second-order generalized integration was used,thus avoiding the use of voltage sensors and phase-locked loop.In addition,in order to make the strategy have better stability and anti-jamming ability under non-ideal conditions,a robust passive controller was designed by the derived current model.Finally,the experimental verification under the condition of high impedance and capacity grid shows that the strategy has enhanced dynamic performance and robustness.
作者 黄敏 陈凡 吴卫民 姚志垒 HUANG Min;CHEN Fan;WU Wei-min;YAO Zhi-lei(School of Logistics Engineering,Shanghai Maritime University,Shanghai 201306,China)
出处 《电机与控制学报》 EI CSCD 北大核心 2022年第3期127-136,共10页 Electric Machines and Control
基金 国家自然科学基金(52077131)。
关键词 并网逆变器 弱电网 锁相环 直接功率控制 无源控制器 动态性能 鲁棒性 grid-connected inverters weak grid phase-locked loop direct power control passive controller dynamic performance robustness
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