4H-SiC台阶型沟槽MOSFET器件

4H-SiC step trench MOSFET device

介绍了一种4H-SiC台阶型沟槽MOSFET器件。该结构引入了台阶状沟槽,使用TCAD软件对台阶状沟槽的数量、深度、宽度等参数进行了拉偏仿真,确定了最优台阶结构参数。仿真结果表明,与传统的UMOS器件相比,最优台阶结构参数下的台阶状沟槽MOSFET器件关断状态下的栅氧化层尖峰电场减小了12%,FOM值提升了5.1%。提出了形成台阶的一种可行性方案,并给出了实验结果,SEM结果表明,可以通过侧墙生长加湿法腐蚀的方法形成形貌良好的台阶。

A 4H-SiC step trench MOSFET device was proposed.The step trench was adopted in this structure.TCAD was used to complete the optimization simulation of the parameters of step trench,including numbers,depth and width.The optimum step trench parameters were achieved.The simulation results show that compared with traditional trench MOSFET device,the gate oxide peak electric field in the off state of the optimized step trench MOSFET is reduced by 12%and the FOM value is increased by 5.1%.A feasible scheme for forming step trench was proposed and the trial result is provided.The SEM result shows that step trench with satisfied morphology can be formed by the method of sidewall growth and wet etching.