一种硅微谐振式加速度计频率读出方法与ASIC实现

A Method for Frequency Readout of Silicon Resonant Accelerometer and Realization of ASIC

针对硅微谐振式加速度计(SRA),提出了一种低噪声、低功耗、可集成的频率读出电路。频率读出电路主要基于Σ-Δ原理,实现了对量化噪声的调制与抑制,在0.1 Hz频率下实现了0.1Mhz/√Hz的频率测量水平。同时,专用集成电路(ASIC)实现了对加速度测量中频率非线性的补偿,实现了在质量块正弦调制谐振梁情况下频率的零均值变化,解决了冲击和振动环境中非线性导致的加速度偏移问题。最后,ASIC以0.35μm CMOS工艺实现,并与前端模拟振荡电路集成,构成了完整的SRA单芯片测控系统。

A low noise,low power,integrated frequency readout circuit was proposed for the silicon resonant accelerometer(SRA).It is mainly based on theΣ-Δprinciple,which realizes the modulation and suppression of quantization noise,and achieves the frequency measurement level of0.1 m Hz/√Hzat a frequency of 0.1 Hz.Meanwhile,the application specific integrated circuit(ASIC)realizes the compensation of frequency nonlinearity in acceleration measurement,achieves the zero mean change of frequency in the case of the sinusoidal modulation of the resonant beam by the mass block,and solves the problem of acceleration offset caused by nonlinearity in the shock and vibration environment.Finally,the ASIC was fabricated by a 0.35μm CMOS process and integrated with the front-end analog oscillator circuit to form a complete SRA single-chip measurement and control system.