基于UVM及VIP的SoC低速端口CAN验证系统设计

The Design of Verification System Based on UVM Platform with VIP

本设计基于UVM环境搭建CAN控制器的验证系统,利用商业VIP可以简化大量验证平台设计工作。CAN控制器集成于SoC平台,CAN的验证环境整合在整体验证环境,针对CAN端口的测试平台作为整体测试一部分。利用VIP生成的组件针对不同验证功能开发多种sequence,配合相应软件配置,验证了集成环境下的CAN的各项测试需求。验证平台搭建比较简单易复用,对于SoC流片提供了充分保证,同时对于芯片的PCB板级验证提供参考和借鉴。

This design builds the verification system of CAN controller based on UVM.The design work is largely simplified with the VIP.The CAN controller is integrated into the SoC platform.The design is the part of SoC verification platform.We can get kinds of sequences for verification platform with the VIP.The verification environment is relatively simple to build and easy to reuse,which guarantees the tape out of System On Chip(SoC)and providing reference of PCB verification at the same time.