一种多片FPGA集成系统的设计方案

Design of Multi-chip FPGA Integrated System

本文结合继电保护装置国产化的设计需求,提出了一种多片FPGA集成系统设计方案。本方案选用多片性能稳定的小容量国产FPGA,以星型结构进行集成,通过主节点FPGA实现系统外围单一接口的逻辑功能和CPU与从节点FPGA的数据转发功能,通过从节点FPGA实现系统外围易重用接口的逻辑功能,设计自定义互联接口实现主从FPGA数据交互,所有FPGA基于同一系统时钟和复位同步化运行。本系统实现简单、稳定可靠,已开始在国产化试点工程中挂网运行。

This paper analyzes the design requirement of the localization of the relay protection devices and gives a design scheme of a multi-chip FPGA integrated system.The system selects multiple small-resource domestic FPGA to integrate in a star structure,which has stable performance.The master node FPGA is used to realize the logic function of the single peripheral interface of the system and the data forwarding function of the CPU and the slave node FPGA.The slave node FPGA is used to realize the logic function of the reus-able peripheral interface of the system.The user-defined interconnection interface is designed to realize the data interaction between the master and slave FPGA.All FPGAs operate synchronously based on the same system clock and reset.The system is simple to implement andhas been proved stable and reliable,and has begun to run in the localization pilot project.