塑闪阵列探测器读出ASIC阈值产生与调节电路的设计

Development of the Readout ASIC Chip’s Threshold Generating and Regulating Circuit for Plastic Scintillator Detector

基于GF 0.18 um CMOS工艺,设计并实现了ASIC芯片中的重要组成部分−阈值产生与调节电路,包括DAC模块和基于SPI慢控接口模块的控制模块。为了有效减少ASIC芯片版图面积、降低功耗,同时提高调节精度,提出通过组合高、低两个4位的DAC实现一个8位DAC的阈值调节,其中多个通道复用一个高4位DAC进行阈值粗调,每通道各自包含一个低4位DAC进行阈值细调。SPI慢控接口模块不仅实现对8位DAC输入的控制来调节触发阈值,还能够控制前放的增益和成型时间的档位。测试结果表明:DAC模块的DNL<0.10 LSB;INL<0.18 LSB;阈值粗调范围约为900 mV;阈值细调范围约为60 mV,精度误差小于7%,可满足ASIC芯片中的甄别器对阈值调节的需求。

This paper designs and implements a variable voltage threshold generation and regulation circuit in the global foundries(GF)0.18µm CMOS technology,including the DAC module and the control module based on the SPI module interface.The circuit is an important part of the readout ASIC chip.In order to effectively reduce the layout area of ASIC chip,reduce power consumption,and improve the adjustment accuracy,it is proposed to realize the threshold adjustment of an 8-bit DAC by combining high and low 4-bit DACs,in which multiple channels share a high 4-bit DAC for coarse threshold tuning,and each channel contains a low 4-bit DAC for fine threshold tuning.The SPI slow control interface module not only controls the input of 8-bit DAC to adjust the trigger threshold,but also controls the gain of the preamplifier and the shaping time.The overall layout size of the chip is 800µm×1000µm.The results of laboratory electronics performance tests show that the DNL of DAC is less than 0.10LSB,and the INL is less than 0.18LSB,Also,the coarse adjustment range of the threshold is about 900 mV,and the fine threshold adjustment is about 60 mV,the accuracy error is less than 7%,which can meet the requirements of threshold adjustment of discriminator in ASIC chip.