AES高阶掩码方案抗功耗攻击

Anti Power Attack of AES High-order Mask Scheme

随着密码技术和信息技术的发展,目前的密码算法本身已足够强大,能够对抗传统的密码分析手段,但由于设备本身的工艺特性,其运行时会泄露如功耗、电磁、时间等信息,这些信息能够被攻击者利用从而破解密钥,该方法称为侧信道攻击。AES加密算法容易受到侧信道攻击,为了解决该问题,通常通过添加一个或几个随机值即掩码。当设计d阶时每个值都用到掩码,执行SCA的复杂度呈指数增长,因此设计d阶为安全参数的掩码方案对密码实现的物理安全性有重要意义。根据AES常用的功耗攻击技术,提出了一种d阶掩码方案,此方案是基于Ishai等人在Crypto发表的面向硬件的掩码方案。与此方案相比,所设计的方案可以在处理器上有效的实现。实验结果表明,该方案降低了理论功耗和实践功耗之间的相关性,很好地保护了中间值不被泄露,提高了AES加密算法的抗功耗攻击能力。

Along with the development of the password technology and information technology, the current password algorithm itself is strong enough to against the traditional means of password analysis, but due to the technological characteristics of the device itself, its runtime leaked information, such as power consumption, electromagnetic, time, which can be used to break key attackers. This method is called the side channel attacks. AES algorithm is vulnerable to side channel attack. In order to solve this problem, one or more random values are added, namely masks. Masks are used for each value when d-order is designed, and the complexity of SCA execution increases exponentially. Therefore, it is of great significance to design a mask scheme with d-order as a security parameter for the physical security of cryptographic implementation. We propose a d-order mask scheme based on the hardware-oriented mask scheme published by Ishai et al. in Crypto, based on the commonly used power attack technology of AES. Compared with this scheme, the proposed scheme can be effectively implemented on the processor. The experimental results show that the proposed scheme reduces the correlation between theoretical power consumption and practical power consumption, protects the intermediate value from leakage, and improves the anti-power attack ability of AES encryption algorithm.