基于整数权重的非二进制SAR ADC及其校准算法的设计

Design of integer-weight-based non-binary SAR ADC and calibration algorithm

针对逐次逼近型模数转换器(Successive Approximation Register Analog-to-Digital Converter,SAR ADC)中电容失配引起转换精度降低的问题,提出了基于扰动的高精度SAR ADC校准算法.SAR ADC采用整数权重非二进制结构的分段电容阵列,在未增加额外冗余电容的情况下可实现误差容错的冗余功能,提高了SAR ADC输入信号的摆幅与转换精度.仿真结果表明,该校准算法将无杂散动态范围(Spurious-Free Dynamic Range,SFDR)从60.0 dB提升到106.3 dB,将有效位数(Effective Number of Bits,ENOB)从9.28 bit提升到13.75 bit,仿真结果验证了校准算法的正确性和有效性.

Aiming at the problem of reduced conversion accuracy caused by capacitance mismatch in Successive Approximation Register Analog-to-Digital Converter(SAR ADC), a perturbation-based highprecision SAR ADC calibration algorithm is proposed. The SAR ADC adopts a segmented capacitor array with integer-weight-based and non-binary structure. It can realize the redundancy function of error tolerance without adding additional redundant capacitors and improve the swing and conversion accuracy of the input signal for SAR ADC. The simulation results show the calibration algorithm improves the Spurious-Free Dynamic Range(SFDR) from 60.0 to 106.3 dB, and the Effective Number Of Bits(ENOB) is raised from9.28 to 13.75 bit. The simulation results verify the correctness and effectiveness of the calibration algorithm.