以太网与CAN总线通信的FPGA设计与实现

FPGA design and implementation of communication between Ethernet and CAN bus

提出一种以太网与CAN总线通信的FPGA设计。以FPGA作为时序主控芯片,根据CAN总线数据交互格式,编写底层代码实现对CAN总线数据的收发;根据以太网UDP(User Data Protocol)通信协议,实现网口的双向通讯。为了保证总线间通信的正确性,对数据流进行双向测试,结果表明,CAN总线与以太网之间的通信正确,数据传输无误。

In order to realize the requirement of different bus protocol communication between equipments,an FPGA design of Ethernet and CAN bus communication is proposed.Using FPGA as the time sequence main control chip,and according to the CAN bus data interactive format,the bottom code is written to transmit and receive the CAN bus data.The two-way communication of the network interface is realized according to the Ethernet UDP(User Data Protocol) communication protocol.For the correctness of the communication between different buses,the data flow is tested in both directions.The test results show that the communication between CAN bus and Ethernet is correct,and so is the data transmission.