摘要
智能化交通建设是“十四五”规划的一项重要建设项目,高速公路和高铁智能化管理是其中的重要研究课题之一。为了降低高速公路和高铁事故发生概率,采用FPGA并行处理、流水线运算的方式,结合片外SDRAM的高速大容量缓存和图像处理相关算法,实现了对目标图像的采集、缓存、检测和显示功能。最后利用FPGA对行车检测系统进行了板级测试,测试结果表明,此行车检测系统可以较好地对行车进行检测。并且帧频可以接近60pfs,满足实时性要求,其具有实际的意义和应用价值。
Intelligent transportation construction is a significant project in the“14th Five-Year Plan”,which includes two vital research topics-highway and intelligent management of high-speed rail.To reduce the probability of highway and high-speed rail accidents,this design uses FPGA parallel processing,pipeline operation,combines with off-chip SDRAM’s high-speed and large-capacity cache and image processing related algorithms.And it will achieve the function of acquiring target image,cache,detection and display.Finally,FPGA is used to carry out a board-level test on the driving detection system,which demonstrates that this driving detection system can detect driving successfully.At the same time,the system’s rate is close to 60 pfs,which suits the real-time requirements and has practical meaning and application value.
作者
王泓淇
陈守满
文雅宏
周超凡
赵东勃
WANG Hongqi;CHEN Shouman;WEN Yahong;ZHOU Chaofan;ZHAO Dongbo(School of Electronics and Information Engineering, Ankang University, Ankang 725000, China)
出处
《微型电脑应用》
2022年第6期13-16,共4页
Microcomputer Applications
基金
陕西省大学生创新创业训练计划项目(S202111397067)、(S202111397052)
安康学院校级项目(2021AYQN013)。
关键词
FPGA芯片
高速公路和高铁
智能行车检测
FPGA chip
expressways and high-speed rail
intelligent driving detection