摘要
UltraScale+架构FPGA采用16 nm FinFET工艺,功耗低且性能高,但存在粒子翻转阈值下降及多位翻转增多等风险。基于线性能量传输(LET)等效机理,选取^(7)Li^(3+)、^(19)F^(9)、^(35)Cl^(11,14+)、^(48)Ti^(10,15+)、^(74)Ge^(11,20+)、^(127)I^(15,25+)、^(181)Ta、^(209)Bi 8种重离子进行直接电离单粒子试验,建立单粒子闩锁(SEL)、翻转阈值、翻转截面及多位翻转的测定方法。结合LET通量及FinFET结构下的注射倾角,搭建甄别单位翻转及多位翻转的识别算法,能够实时处理并实现粒子翻转状态及多位翻转数据的可视化监控。所涉及的单粒子效应(SEE)分析方法能够较为全面地评估该电路的抗辐照特性。
The UltraScale+architecture FPGA of 16 nm FinFET process has low power consumption and high performance,but there are risks such as the decrease of single event upset threshold and the increase of multi bit upset.Based on the linear energy transfer(LET)equivalent mechanism,eight heavy ions,namely ^(7)Li^(3+)、^(19)F^(9)、^(35)Cl^(11,14+)、^(48)Ti^(10,15+)、^(74)Ge^(11,20+)、^(127)I^(15,25+)、^(181)Ta、^(209)Bi,are selected for direct ionization single event experiment.The measurement methods of single event latch(SEL),upset threshold,upset section and multi bit upset are established.Combined with the LET flux and the injection angle under the FinFET structure,the recognition algorithm for identifying single bit upset and multi bit upset is built,which can process and realize the visual monitoring of event upset status and multi bit upset data in real time.The single event effect analysis method involved can comprehensively evaluate the irradiation resistance properties of the circuit.
作者
谢文虎
郑天池
季振凯
杨茂林
XIE Wenhu;ZHENG Tianchi;JI Zhenkai;YANG Maolin(Wuxi Esiontech Co.,Ltd.,Wuxi 214072,China)
出处
《电子与封装》
2022年第7期7-12,共6页
Electronics & Packaging