Optimizing the thickness of Ta_(2)O_(5) interfacial barrier layer to limit the oxidization of Ta ohmic interface and ZrO_(2) switching layer for multilevel data storage

The multilevel storage capability of nonvolatile resistive random access memory(ReRAM)is greatly de-sired to accomplish high functioning memory density.In this study,Ta_(2)O_(5) thin film with different thick-nesses(2,4,and 6 nm)was exploited as an appropriate interfacial barrier layer for limiting the formation of the interfacial layer between the 10 nm thick sputtering deposited resistive switching(RS)layer and Ta ohmic electrode to improve the switching cycle endurance and uniformity.Results show that lower form-ing voltage,narrow distribution of SET-voltages,good dc switching cycles(10^(3)),high pulse endurance(10^(6) cycles),long retention time(10^(4) s at room temperature and 100℃),and reliable multilevel resis-tance states were obtained at an appropriate thickness of∼2 nm Ta_(2)O_(5) interfacial barrier layer instead of without Ta_(2)O_(5) and with∼4 nm,and∼6 nm Ta_(2)O_(5) barrier layer,ZrO_(2)-based memristive devices.Besides,multilevel resistance states have been scientifically investigated via modulating the compliance current(CC)and RESET-stop voltages,which displays that all of the resistance states were distinct and stayed stable without any considerable deprivation over 10^(4) s retention time and 104 pulse endurance cycles.The I-V characteristics of RESET-stop voltage(from−1.7 to−2.3 V)of HRS are found to be a good linear fit with the Schottky equation.It can be seen that Schottky barrier height rises by increasing the stop-voltage during RESET-operation,resulting in enhancing the data storage memory window(on/offratio).Moreover,RESET-voltage and CC control of HRS and LRS revealed the physical origin of the RS mecha-nism,which entails the formation and rupture of conducting nanofilaments.It is thoroughly investigated that proper optimization of the barrier layer at the ohmic interface and the switching layer is essential in memristive devices.These results demonstrate that the ZrO_(2)-based memristive device with an optimized∼2 nm Ta_(2)O_(5) barrier layer is a promising candidate for multilevel data storage memory applications.