实时化自由空间光通信技术研究

Real-Time Free-Space Optical Communication Technology

针对自由空间光(FSO)通信的实时化应用问题,本文采用自研的收发一体实时数字相干通信模块,基于自由空间光信道,通过实验验证了8×10 Gb/s、偏振复用正交相移键控(PDM-QPSK)信号的实时相干通信系统。在7%前向纠错码(FEC)条件下,通过使用掺铒光纤放大器(EDFA)调整接收端功率,该实时数字相干通信系统的单通道背靠背接收灵敏度达到了-50 dBm左右;8路信道的光载波频率间隔为12.5 GHz,且在不引入其他损耗的情况下,通过1 m左右的空间光链路实现了全信道的无误码传输。

Objective Recently,there has been a rapid evolution in optical communication systems,leading to the establishment and development of various subdivisions,such as metropolitan area networks,access networks,and data center optical interconnection.However,current optical network architectures available on the ground are becoming insufficient to meet the growing demands of the society.Therefore,some new application scenarios,such as satellite communication,marine communication,and communication in some areas where optical fibers are difficult to arrange,e.g.,mountains,forests,and lakes,are attracting widespread attention.Based on current optical communication network architectures,a three-dimensional,spatial,and multimodal optical network system is emerging.In this system,the free-space optical(FSO)communication featuring unlicensed bandwidth,high capacity,strong confidentiality,and easy setup plays an important role.Therefore,for practical in-field application of FSO communication,studies on embedded real-time FSO systems are necessary.Methods To investigate the real-time applications of FSO transmission,in this study,we experimentally demonstrate a real-time multicarrier FSO communication system with a self-designed electrical board,including a field-programmable gate array(FPGA),four-channel transmitter supporting 2.5 GBaud signals,and 4×5 GSa/s analog-to-digital converter(ADC).The 10 Gb/s polarization digital multiplexing quadrantile phase-shift keying(PDM-QPSK)signals were generated using a dual-polarization IQ(DP-IQ)modulator and loaded onto eight optical carriers spaced at 12.5 GHz.All optical carriers can be recovered with an error-free bit error ratio(BER)performance.Results and Discussions The experiment setup of the real-time 8×10 Gb/s PDM-QPSK coherent transmission over a 1 mFSO link and the experiment platform are shown in Figs.1 and 5(a),respectively.At the transmitter side of the system,eight external cavity lasers with~100 kHz linewidth spaced at 12.5 GHz were used as the sources.All the channels were coupled using an optical coupler and fed into a DP-IQ modulator,where the 10 Gb/s pseudorandom-bit-sequences-23 were modulated.The signal spectrum of the transmitted signal is shown in Fig.2.Then,the optical signal was amplified using erbium-doped fiber amplifiers(EDFA)to adjust the power and transmit it into the free-space link.At the receiver side,the signal was detected using an integrated coherent receiver and ADC.Subsequently,different channels were selected by tuning the wavelength of a local oscillator without any optical filter.All the sampled signals were processed using the FPGA with real-time digital signal processing(DSP)algorithms,including ADC synchronization,clock recovery,constant modulus algorithm(CMA),frequency offset recovery,phase offset recovery,and symbol decision,as shown in Fig.1.The results of the experiment were shown in Figs.6 and 7.Figure 6(a)shows the receiver sensitivity of the real-time integrated coherent receiver in a back-to-back case.By adjusting the optical attenuator,we reduced the receiver power from -45 to -51 dBm and obtained the BER using the signal-to-noise ratio.When the receiver power is-50 dBm,BER is 2.9×10^(-3),which is under the 7% FEC limit(BER is 3.8×10^(-3)).Figure 6(b)shows the received spectrum and constellation diagram from channel 8 in the multicarrier FSO experiment.The results of each stage of the realtime algorithm processing are shown in Fig.7.Figures 7(a)--(d)represent the sampled data of ADC without DSP algorithms,results after CMA,results after frequency offset recovery,and results after phase compensation,respectively.Conclusions In this study,we propose an 8×10 Gb/s PDM-QPSK real-time digital coherent communication system via experiments using a free-space link.Based on an FPGA chip,we have completed the programming of the real-time DSP algorithms and conducted the corresponding performance test.The experimental results show that after using EDFA,under the 7% FEC threshold,the receiving sensitivity of the digital coherent module is as low as-50 dBm.Furthermore,all the channels of the system with 12.5 GHz frequency intervals achieve a realtime error-free transmission through a 1 mfree-space link.