摘要
2048kbit/s接口是通信网中传输网、接入网、同步网的主要数据或定时接口。传统的接口芯片主要实现NRZ码和HDB3编码之间的编解码。本文利用国产JP5028G芯片进行了E1定时电路设计并进行了验证。
2048kbit/s interface is the main data or timing interface of transmission network,access network and synchronization network in communication network.The traditional interface chip mainly realizes the encoding and decoding between NRZ code and HDB3 code.In this paper,the E1 timing circuit is designed and verified by using domestic jp5028g chip.
出处
《现代传输》
2022年第4期30-34,共5页
Modern Transmission
