FPGA部分重构系统设计与实现

Design and Implementation of FPGA Partial Reconfiguration System

凭借开发周期短、使用场景灵活等优点,现场可编程逻辑门阵列(Field Programmable Gate Array,FPGA)在电子对抗系统中的应用越来越广泛。随着电子对抗系统的复杂化和功能多样化,系统设计对FPGA的硬件资源规模需求越来越大,随之带来了成本骤升的问题。针对日渐复杂的系统设计和有限的FPGA硬件资源的矛盾,提出了一种基于FPGA和DSP实现的部分重构系统方案。通过不同时刻动态加载不同FPGA功能模块的方式,实现了FPGA资源的复用。这种技术是数字系统设计方法、设计思想的变革,使FPGA资源利用率成倍提高,实现系统功能所用的硬件规模大大下降。

Having the advantages of short development cycle and flexible use scenarios,field programmable logic gate array is more and more widely used in electronic countermeasure systems.With the complexity and function diversification of electronic countermeasure systems,the systemdesign requires more and more FPGAhardware resources,resulting in a sharp rise in costs.Aiming at the contradiction between the increasingly complex system design and the limited FPGA hardware resources,a partial reconfiguration system solution based on FPGA and DSP is proposed.By loading different FPGA function modules at different moments,the FPGA resources are reused.This technology is a change of digital system design methods and design ideas,doubling the utilization of FPGA resources and greatly reducing the scale of hardware used to realize systemfunctions.