基于FPGA的高性能回收控制器的设计与实现

Design and Implementation of High Performance Recovery Controller Based on FPGA

针对中国新一代载人飞船对回收着陆系统的高可靠、高实时、不可逆、一次成功等要求,为了使回收分系统控制单元在复杂控制模式下高精确完成弹减速伞、弹主伞、抛防热大底、着陆缓冲控制等相关的动作,设计了以现场可编程门阵列(Field Programmable Gate Array,FPGA)为核心处理器装置的控制单元,实现了对航天器的现有减速与缓冲装置的可靠、精确地控制。该控制器采用三模冗余(Three Mode Redundancy,TMR)控制策略,程序上采取了复杂状态机等并行执行的控制逻辑,系统上采取了3个分时启动电路,输出上采取了具有自反馈校正的同步校验信号系统。在满足产品上电浪涌电流的同时,以三取二方式有效的输出规定脉宽时序的指令信号,满足了后一级执行机构的动作需求。实物产品飞行试验验证结果显示,回收控制器启动特性、指令时间、响应性能均满足航天器现有减速与缓冲装置要求,可为同类型其他设计提供一定的借鉴和参考。

According to a new generation of Chinese manned spacecraft landing on recovery system of high reliability,high real-time,irreversible,success ensurance requirement,in order to make the recovery subsystem control unit high precision in complex control mode to complete deceleration parachute opening,the main parachute opening,aeroheat protection bottoms,landing buffer control related functions.We design the control unit based on field programmable gate array.FPGA is the control unit of the core processor device,which realizes the reliable and accurate control of the existing deceleration and buffer device of the spacecraft.The controller adopts the control strategy of three mode redundancy(TMR).The program adopts the control logic of parallel execution such as complex state machine,and the system adopts Three time-sharing starting circuits.The output adopts a synchronous check signal system with self-feedback correction.In addition to meeting the power current of the product,the command signal specifying the timing sequence of pulse width can be effectively output by taking two from three to meet the action requirements of the actuator at the next level.The flight test results of the real product show that the startup characteristics,command time and response performance of the recovery controller meet the requirements of the existing spacecraft deceleration and buffer device,which can provide a certain reference for other designs of the same type.