自适应光电混合互连分流结构建模与性能分析

Modeling and performance analysis of adaptive optoelectronic hybrid interconnection shunt structure

针对片上光电混合互连网络(hybrid optoelectronic network-on-chip,HONoC)拥塞控制与自适应能力差、无法实现光电联合仿真等问题,提出一种适用于可重构阵列处理器的自适应光电混合互连分流结构,在此结构上设计了自适应分流路由算法与一种低损耗无阻塞的5端口光路由器,并搭建了基于System verilog与Verilog的光电混合互连功能仿真与性能统计模型。实验结果表明,在边缘节点阻塞的情况下所设计的路由算法避免拥塞能力平均提升了17.5%,光路由器所需交叉波导与微环谐振器数量大幅减少,平均光路由器级插入损耗仅为0.522 dB,所设计的光电混合互连性能统计模型具有支持设计拓扑、结构和路由策略等功能,并且可以对资源使用、功耗开销、插入损耗等性能进行统计分析。

Aiming at the problems of hybrid optoelectronic network-on-chip(HONoC),such as congestion control and poor adaptive capabilities,and the inability to realize optoelectronic co-simulation,an adaptive hybrid optoelectronic interconnection shunt structure suitable for reconfigurable array processors is proposed.Based on this structure,an adaptive shunt routing algorithm and a low-loss non-blocking 5-port optical router are designed,and an adaptive hybrid optoelectronic interconnection simulation model and performance statistical model based on System verilog and Verilog are established.The experimental results demonstrate that in the case of network edge node congestion,the routing algorithm designed to avoid congestion improves 17.5% on average,the number of cross waveguides and microring resonators required for optical routers is greatly reduced,and the average path insertion loss is only 0.522 dB.The hybrid optoelectronic interconnection performance statistical model has function such as supporting the design of routing strategies and topology structures.It can perform statistics on resource usage,power consumption,insertion loss,and other performance.