容性耦合放电等离子体增强氧化硅薄膜沉积模拟研究

Numerical investigation of SiO_(2) film deposition enhanced by capacitively coupled discharge plasma

随着集成电路技术的快速发展,芯片结构更加复杂,尺寸越来越小,对薄膜沉积的性能提出了更高的要求.等离子增强化学气相沉积(PECVD)与CVD等传统工艺相比,可以在低温下实现镀膜,提供高密度、高性能的薄膜.本工作采用二维流体蒙特卡罗模型耦合沉积剖面演化模块研究了容性耦合SiH_(4)/N_(2)O/Ar混合气体放电中的极板径向位置、气体比例和气压对PECVD氧化硅薄膜沉积的影响.结果表明,离子通量和中性基团通量在极板位置的差异化分布使得所沉积薄膜沿着径向存在较大的不均匀性.进一步研究发现通过增大笑气、减小Ar含量或增大气压,薄膜的沉积效率会得到提升.但是,过快的沉积速率会导致槽结构中出现“钥匙孔结构”、空位和杂质过多等一系列不良现象.这些问题在实际工艺中很棘手,在后续的研究中将通过调控放电参数等来改善薄膜质量,以期指导实际工艺.

Higher requirements for the performances of thin films need to be fulfilled in the rapid development of integrated circuit technology,due to the more complicate structure and smaller size of chips.In plasma-enhanced chemical vapor deposition,high-density and high-performance thin films can be deposited at low temperature,compared with traditional chemical vapor deposition.In this work,a two-dimensional fluid/MC model coupled with the deposition module is used to describe the capacitively coupled SiH_(4)/N_(2)O/Ar discharges as well as the deposition processes,focusing on the influences of the radial position,gas ratio and gas pressure on the deposition of silicon oxide films.The results show that the edge effect which leads the plasma density to rise near the electrode edges gives rise to the non-uniform deposition rate along the radial direction.It is also found that the more N2O and less Ar content in the gas mixture,as well as an increased gas pressure will improve this uniformity.However,an excessive deposition rate will lead to a series of undesirable phenomena,such as“key hole structure”,vacancies and excessive impurities in films.These problems are also troublesome in the microelectronics manufacture processes.More detailed investigation into the deposition mechanism can be expected in the future.