期刊文献+

高功率条件下MOSFET栅电荷特性的测量方法 被引量:1

A Measurement Method for Gate Charge Characteristics of MOSFET Under High Power Condition
下载PDF
导出
摘要 提出了一种高功率条件下MOSFET栅电荷特性的有效测量方法。在半桥电路的下管开启过程中,沟道出现高电流和高电压同时存在的情况,产生很高的瞬态功率。对于传统栅电荷测试方案,这不仅要求直流电源具备相当的功率输出,而且会在高功率区产生严重的自热效应,无法得到准确的栅电荷特性曲线。文章基于栅电荷测试的基本物理过程和关系,通过测量大电压-小电流与大电流-小电压下的栅电荷特性,获得了高功率条件下MOSFET的栅电荷特性。结果表明,该方法得到的栅电荷特性曲线及参数值与标准规格书的结果非常接近,具有很好的工业应用价值。 An effective measurement method for gate charge characteristics of MOSFET under high power was proposed.During the turn-on process of the lower transistor in a half-bridge circuit,a large drain current and a high drain-voltage would occur,producing a much high transient power.For the traditional test technique,not only an equal high power is required for the DC source used,but also a serious self-heating effect cannot be eliminated.Both of them lead to inaccurate gate charge curves.In this paper,based on the basic physical process and relationship of gate charge test,the gate charge characteristics of MOSFET under high power were obtained by measuring the characteristics of gate charge under high voltage-small current and high current-small voltage.The results showed that the characteristic curve and the parameters obtained by this proposed method were nearly close to the values given by the standard specification,which had good industrial application value.
作者 王燕平 荣玉 陈雷雷 李金晓 冯慧玮 闫大为 WANG Yanping;RONG Yu;CHEN Leilei;LI Jinxiao;FENG Huiwei;YAN Dawei(Engineering Research Center of IoT Technology Applications of Ministry of Education,Department of Electronic Engineering,Jiangnan University,Wuxi,Jiangsu 214122,P.R.China)
出处 《微电子学》 CAS 北大核心 2022年第3期478-483,共6页 Microelectronics
基金 江苏省研究生科研与实践创新计划项目(KYCX18_1855)。
关键词 MOSFET 高功率 栅电荷特性 测量 MOSFET high power gate charge characteristics measurement
  • 相关文献

参考文献8

二级参考文献24

  • 1衡草飞,向军利,李肇基,张波,罗萍.Power MOSFET栅电荷分析及结构改进[J].电子质量,2004(9):59-61. 被引量:7
  • 2蒋苓利,罗萍,蒲奎,赵璐.低压大电流VDMOS器件栅电荷测量[J].实验科学与技术,2006,4(B12):49-51. 被引量:5
  • 3LIAO C N, CHIEN F T, WANG C L, et al. A novel power mosfet structure with shallow junction dual well design [ J]. IEICE Transactions on Electronics, 2007, 90 (5): 937.
  • 4YIIN A J, SCHRIMPF R D, GALLOWAY K F. Gate- charge measurements for irradiated n-channel DMOS power transistors [ J ]. IEEE Transactions on Nuclear Science, 1991, 38 (6) : 1352 - 1358.
  • 5MAKARAN J E. Gate charge control for MOSFET turn- off in PWM Motor drives through empirical means [ J]. IEEE Transactions on Power Electronics, 2010, 25 (5) :1339 -1350.
  • 6HUETING R J E, HIJZEN E A, HERINGA A, et al. Gate-drain charge analysis for switching in power trench MOSFETs [ J]. IEEE Transactions on Electron Devices, 2004, 51 (8): 1323-1330.
  • 7BALIGA B Ji Fundamentals of power semiconductor devices [ M ]. Springer, 2008 : 409 - 426.
  • 8SAITO W, NITTA T, KAKIUCHI Y, et al. Suppression of dynamic on-resistance increase and gate charge measurements in high-voltage GaN-HEMTs with optimized field-plate structure [ J]. IEEE Transactions on Electron Devices, 2007, 54 (8) : 1825 - 1830.
  • 9陈星弼功率MOSFET与高压集成电路[M].
  • 10刘松,丁宇.通信系统中超高效率Buck变换器设计考虑[J].今日电子,2009(2):70-71. 被引量:1

共引文献15

同被引文献5

引证文献1

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部