基于BLLC拓扑的数字功率放大器

Digital Power Amplifier Based on BLLC Topology

随着工业的发展,许多工业领域对数字功率放大器有了新的要求。在许多工况下,用户要求功率放大器输出电压只有几十到几百毫伏,输出电流却要达到数十安培,等效阻抗达到毫欧级。在这种工况下,传统的H桥数字功率放大器已不能很好地满足用户的需求。此处采用bipolar LLC(BLLC)拓扑,设计出一种新型的数字功率放大器,通过阻抗变化降低电路输出阻抗,使得电路在毫欧级负载情况下仍能有较高的能量转换效率和较低的总谐波畸变率(THD)。此处使用PSIM搭建仿真模型比较了两种控制策略的优劣,并制作出电路进行实验。实验结果表明:该电路在负载为20 mΩ的情况下能量转换效率为62.28%。

With the development of industry,many industrial fields have new requirements for digital power amplifier.Under many working conditions,users require that the output voltage of the power amplifier is only tens to hundreds of millivolts,the output current should reach tens of amperes,and equivalent impedance should reach milliohm level.Under this condition,the traditional H-bridge digital power amplifier can not meet the needs of users.A new digital power amplifier is designed based on bipolar LLC(BLLC) topology,the output impedance of the circuit is reduced through impedance change,so that the circuit can still have high energy conversion efficiency and low total harmonic distortion(THD) under milliohm load.PSIM is used to build a simulation model,the advantages and disadvantages of the two control strategies are compared,and a circuit for experiments is made.The experimental results show that the energy conversion efficiency of the circuit is 62.28% when the load is 20 mΩ.